#	x86_simd.mak, HW acceleration for crypto op's
#	In main <project>.mak set:
#		X86_SIMD = 64 # compile for 64 bit
#		X86_SIMD = 32 # compile for 32 bit
#		X86_SIMD = 1  # compile for 32 bit
#	In platform.h set:
#		#define IA32_CRYPT_AESNI
#		#define IA64_CRYPT_AESNI

ifdef X86_SIMD

X86_SIMD_SRC =  $(IP_SRC)/common/ilib-cpp/x86_simd

#shani_flags = -msha -mavx
aflags_x86_simd = -c -Wall -nostdlib -fno-builtin -fno-rtti -fno-exceptions -nostdinc++

ifeq ($(X86_SIMD),1)
# 32-bit
aflags_x86_simd += -march=i386 -m32
endif

ifeq ($(X86_SIMD),32)
# 32-bit
aflags_x86_simd += -march=i386 -m32
endif

ifeq ($(X86_SIMD),64)
# 64-bit
endif

SRC += $(X86_SIMD_SRC)/aesni-intel_asm.S
$(OUTDIR)/obj/aesni-intel_asm.$(OBJ_EXT): $(X86_SIMD_SRC)/aesni-intel_asm.S
	$(CC) $(aflags_x86_simd) $< -o $*.o
LIBOBJS += $(OUTDIR)/obj/aesni-intel_asm.o

SRC += $(X86_SIMD_SRC)/aesni-intel_glue.c
$(OUTDIR)/obj/aesni-intel_glue.$(OBJ_EXT): $(X86_SIMD_SRC)/aesni-intel_glue.c
LIBOBJS += $(OUTDIR)/obj/aesni-intel_glue.o

#SRC += $(X86_SIMD_SRC)/shani-intel_glue.c
#$(OUTDIR)/obj/shani-intel_glue.$(OBJ_EXT): $(X86_SIMD_SRC)/shani-intel_glue.c
#		$(CC) $(cflags) $(shani_flags) $< -o $*.o
#LIBOBJS += $(OUTDIR)/obj/shani-intel_glue.o

endif # $(X86_SIMD)
